(China (Mainland))
Product Summary
The MC74HC573ADWR is a high–performance silicon–gate CMOS. The MC74HC573ADWR is identical in pinout to the LS573. The devices are compatible with standard CMOS outputs; with pullup resistor, It is compatible with LSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched.
Parametrics
MC74HC573ADWR maximum ratings: (1)Vcc: -0.5 to 7.0V; (2)Vin: -0.5 to Vcc 0.5V; (3)Vout: -0.5 to Vcc 0.5V; (4)Iin: ±20mA; (5)Iout: ±35mA; (6)Icc: ±75mA; (7)Tstg: -65 to +150℃; (8)TL: 260℃.
Features
MC74HC573ADWR features: (1)Output Drive Capability: 15 LSTTL Loads; (2)Outputs Directly Interface to CMOS, NMOS and TTL; (3)Operating Voltage Range: 2.0 to 6.0 V; (4)Low Input Current: 1.0 mA; (5)In Compliance with the Requirements Defined by JEDEC Standard No. 7A; (6)Chip Complexity: 218 FETs or 54.5 Equivalent Gates.
Diagrams
| Image | Part No | Mfg | Description |  |
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 MC74HC573ADWR2 |
ON Semiconductor |
Latches 2-6V Transparent |
Data Sheet |
Negotiable |
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MC74HC573ADWR2G |
ON Semiconductor |
Latches 2-6V Transparent Non-Inverting |
Data Sheet |
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